The following has1 Lab and 4 Exercises.
Parts of the homework can be handwritten & scanned as long as it is legible
Lab (10 points in Discussion Board
CSC 376 HW6 Lab Sequential Logic
In this lab you will:
● Predict the output of a sequential logic circuit given a sequence of inputs.
○ Post an image of your timing diagram to the discussion board.
● Test the sequential circuit in Logisim
○ Reply to your own post you made to the discussion board Either confirm your prediction or explain why it was inaccurate.
Part 1 Predicting behavior
Consider the following circuit, consisting of two D flip-flops (1-bit registers), a 1-bit input A, and a 1-bit output Z.
Fill in the timing diagram for this circuit. Do not use Logisim for this part. As shown, the input A is given, and the flip-flops are both initially holding 0.
You may either draw the signals by hand or edit the above figure directly by going to http://wavedrom.com/editor.html and replacing the text with
{signal: [ {name: 'CLK', wave: 'p…….'},
{name: 'A', wave: '0101..0.'},
{name: 'Q1', wave: '0'},
{name: 'Q2', wave: '0'},
{name: 'Z', wave: '0'},],
head:{ tock:0, },
}
You would fill in a series of additional 0's and 1's for Q1, Q2, and Z in the wave attribute. When a signal does not change, you should put a period (.) instead of the same value. For example, when A is 1 for three cycles we put '1..' instead of '111'.
Post an image of your timing diagram to the discussion board
Part 2: Test your prediction
Now that you know how to build and simulate circuits in Logisim, you will test your answer to Part 1
a) Build the circuit from part 1 in a new Logisim file. Make sure that you hook up the CLK inputs of the flip-flops to a single Clock .
b) By changing the input A and ticking the clock, test whether your predictions in Part 1 for Q1, Q2, and Z are accurate. Reply to your own post you made to the discussion board Either confirm your prediction or explain why it was inaccurate.
Exercises
Exercise 1: (20 points)
Draw the Design Table, the K-maps and the circuit for:
a) Construct an SR flip-flop from a D flip-flop
b) Construct a T flip-flop from a JK flip-flop
c) Construct a D flip-flop from a JK flip-flop
d) Construct a SR flip-flop from a T flip-flop
Refer to Figures 11.17 thru 11.19 & Worked Examples
The most common mistake is to confuse which flip-flop you are making and which one you are using. “from a _ flip-flop” is the flip-flop shown in your circuit. The final circuit should have a design table that matches the flip-flop that you are constructing.
Exercise 2: (10 points)
First, draw the logic diagram, then an analysis table (Excel works nicely for this because you can hide the columns that you are not working on at the moment) and then finally, draw the state transition diagram for a sequential circuit with
two JK flip-flops, FFA and FFB;
two inputs X1 & X2, with flip-flop inputs:
JA = X2
KA = X1 B’
JB = X1 X2 A
KB = X1’ + X2’
And output:
Z = X1 A’ + X2 B’
Refer to Figs 11.27 thru 11.32 – The Truth Table should look like 11.28
The table in 11.29 may help you create the diagram
Also see Chapter 11 – additional worked Example for #11
Exercise 3: (10 points) See Chapter 11 – Additional Worked Examples
Textbook page 593, #16 (c)
Show the Truth Table, the K-maps (There will be two – one for each Flip-Flop) and then finally draw the circuit.
Refer to Figs 11.32 thru 11.35 (I prefer the circuit drawn as one diagram)
Exercise 4: (10 points)
Textbook page 591 #3(c), 3(d)
Construct a table similar to the solution for 3 (a) and 3 (b).